CHIPS Alliance will ease the deployment and designing of RISC-V
On Monday, Linux Foundation has come forward with a new announcement on Monday. The statement is based on the formation of a new project “CHIPS Alliance.” The foundation said that the project is going to host and at the same time create a top-notch open source code which is ultimately related to the designing of much flexible and efficient chip designing of chips.
Eventually, the chips are going to make it in computing, mobile, application of the Internet of Things as well as consumer electronics. According to Linux Foundation, the alliance also centers around a consistent development as well as the adaptation of an ISA, RISC-V. The RISC-V is going to replace the CPUs based on Arm architecture permanently.
The reason as to why Linux Foundation founded the CHIPS Alliance is to deliver next-gen microarchitecture which can be used from microcontrollers as well as the Internet of Things to the applications based on the data center. It acts as a counterpart to the fundamentals of the RISC-V Foundation. The RISC-V, on the other hand, controls the extensions and specification of ISA.
The search giant, Google, on the other hand, is developing a new environment called Universal Verification Methodology. With the help of UVM, it will become easier to examine designs made at architectural and micro-architectural levels.
The data storage provider, Western Digital will also make a significant contribution. WD is going to provide the acclaimed core SweRV along with an Instruction Set Simulator for SweRV along with a test bench. WD is also going to release OmniXtend’s early implementation as well as specification and share it with the entire world.
The RISC-V inventors have curated a company called SiFive. The company is focused on releasing an open-source hardware language for description, Chisel. The RISC-V implementation doesn’t need any patent or royalties as it comes right under the BSD license.
**This post was published on https://www.techrepublic.com
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